From US 2009/096503 A1 there is known a gate turn-off thyristor (GTO), wherein the gate electrode of a substrate is contacted by a ring-shaped contact element. A ring-shaped passivation member is arranged at the edge of the semiconductor substrate surrounding the ring-shaped gate contact element.
From JP 07-312420 A there is known a gate turn-off thyristor (GTO), wherein a pin-shaped ring gate frame electrode is welded on a gate electrode surface of the semiconductor device. Insulating coating material is covering the edge of the semiconductor device.
From U.S. Pat. No. 4,370,180 there is known a gate turn-off thyristor (GTO), wherein the periphery of a substrate is encapsulated by silicon rubber for passivation.
Known prior art turn-off power semiconductor devices include a gate turn-off thyristor (GTO) and an integrated gate-commutated thyristor (IGCT). A known turn-off power semiconductor device comprises a wafer having a first main side, a second main side parallel to the first main side and extending in a lateral direction, an active region and a termination region laterally surrounding the active region. In the active region there arc provided a plurality of thyristor cells between the first main side and the second main side. Each of the thyristor cells comprises in the order from the first main side to the second main side a cathode electrode, a n-type cathode semiconductor layer, a p-type base semiconductor layer, a n-type drift semiconductor layer, a p-type anode semiconductor layer and an anode electrode. Each thyristor cell further comprises a gate electrode which is arranged lateral to the cathode semiconductor layer and contacting the base semiconductor layer. The gate electrodes are implemented as a gate metallization layer electrically connected to a ring-shaped gate contact for connecting all gate electrodes of the plurality of thyristor cells to a control circuit. In a known turn-off power semiconductor device, the ring-shaped gate contact is formed on the first main side of the wafer in the termination region and surrounds the active region.
As an edge passivation, the known turn-off power semiconductor device further comprises a rubber ring arranged on the termination region and surrounding the active region. An electrically conductive gate ring for contacting the ring-shaped gate contact from outside is disposed on and electrically connected to the ring-shaped contact within the rubber ring.
It is also known a turn-off power semiconductor device with an inner ring-shaped gate contact which is not located on the termination region or outer edge region of the wafer but at an inner region of the wafer. Herein, the terms “outer” and “inner” relate to the distance from the center of the wafer in a plane parallel to the first main side of the wafer. The inner ring-shaped gate contact is formed as a ring with its center at the center of the wafer and a radius which is about half the radius of the wafer.
Regarding the device performance, the ring-shaped gate contact on the termination region of the wafer has the following advantages compared to the inner ring-shaped contact:                (i) The gate circuit including the gate leads connecting the gate ring to the control circuit can have a lower impedance.        (ii) A cathode pole piece, which is pressed onto the cathode electrodes of the plurality of thyristor cells for electrically connecting the cathode electrodes of the plurality of thyristor cells to a main current line, does not need to have any channels or feed throughs for the gate leads connecting the gate ring to the control circuit. That has the advantage that the pressure for pressing the cathode pole piece onto the cathode electrodes of the plurality of thyristor cells and also the cooling of the cathode pole piece can be made more homogeneous.)        (iii) In an IGCT where the wafer has an integrated free-wheeling diode, the ratio between the active area used for the thyristor cells and the area used for the integrated free-wheeling diode can be freely chosen between 0% and 100%.        
On the other side, in the known turn-off power semiconductor device described above, the use of a ring-shaped gate contact which is placed on a termination region or edge region of the wafer has the disadvantage compared to an inner ring-shaped contact that it consumes more area of the wafer. The reason is that the width of the ring-shaped gate contact must be the same for both configurations. For example, for a 68 mm wafer, a 3 mm wide ring-shaped gate contact would consume 9% of the available wafer area with an inner ring-shaped gate contact placed at R/2 (where R is the radius of the wafer) but would consume 20% of the available wafer area when the ring-shaped gate contact is placed on the edge region of the wafer. That means that using the ring-shaped contact on the edge region consumes 11% more of the available wafer area.
In a known method for manufacturing the above described turn-off power semiconductor device, the rubber ring is first formed by molding before the gate ring is centered and fixed to the wafer.
Therefore, the tolerances of the rubber ring geometry and the tolerances of centering the gate ring relative to the wafer add up. For a 68 mm wafer these tolerances can add up to 1 mm in diameter. The tolerance for the rubber ring geometry is mainly inherent to the known molding process which uses perfluoroalkoxy alkanes (PFA) as a coating of the mold. Coating the molding forms with PFA has an inherent tolerance. In addition the mold and fixtures are heated to reduce cycle time and the dimensions of the mold and of the fixtures depend on the temperature.
To compensate these tolerances, the width of the ring-shaped gate contact has to be increased. In case that the width of the ring-shaped gate contact is increased by 1 mm for a 68 mm wafer, 8% of the available wafer area is consumed with a ring-shaped gate contact placed at the edge of the wafer but only 3% of the available wafer area is consumed with an inner ring-shaped gate contact.
In order to maximise the active area in a device with the ring-shaped gate contact at the edge of the wafer, the gate ring has to be placed as close to the rubber ring as possible. This involves the risk that a part of the contact area of the gate ring, which is intended to be pressed onto the ring-shaped gate contact, is rather pressed onto the rubber ring instead of being pressed onto the ring-shaped gate contact. This can result in breakage of the wafer, damage of the rubber ring or electrical failure (inhomogeneous contact between the gate ring and the ring-shaped gate contact).